Well I think I just found and root caused accidental O(n^2) behavior in a piece of commercial software that was turning what should have a been a few-second operation into six minutes.
It's sooo nice working with cooperative vendors. Finding and root causing the bug took me only a couple of minutes in VTune thanks to the vendor sharing a non-stripped binary with me to help me troubleshoot.
Filmed and edited another segment of the PIC video (intro to reading standard cell planar CMOS with whiteboard examples plus deconstructing actual photos of an inverter, NAND2, and GDCAP), now an hour 38 minutes.
Still need to do circuit analysis of the SRAM, flash/EEPROM, config fuses, whatever else I might want to dig into, and add some conclusions.
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I had an XC7S25 in the pile, but it cracked pretty badly so I probably won't bother to image it. There's a second one still intact.
I really need a better process for dealing with fiberglass laminate substrates and getting dice off them. The dies on these packages were exposed for 15 minutes of cooking as I tried to get the acid to slowly penetrate the laminate, periodically removing it from the acid, cleaning, using a scalpel to scrape loose glass fibers off the surface, peel…
As I continue to slowly roll out Trixie to more of my fleet: my first virtual desktop VM (my mail client system) to be upgraded works fine for a while, then randomly seems to lock the screen and blank my VNC session after a few minutes of inactivity.
If I log into the VM console from the hypervisor UI and unlock, the VNC comes back.
Wonder what's up there...
For some reason the combination of 160K and my Mitutoyo 100x/0.90 objective means that as the last bits of ILD begin to etch away, substrate features become *less* visible.
I expected to see strong contrast at edges of substrate features when the ILD was etched away despite poly, STI trenches, and diffusion areas all being the same material (silicon).
But that's not what I'm seeing.
Going back to my archives, though, most of my good full die 100x shots are with the …
And another couple of etch cycles on the PIC12F683 done.
On the home stretch, I've almost got the last of the dielectric off. But I don't want to be too aggressive because ideally I'd get a beauty shot of intact poly across the whole die first, *then* undercut the poly and get a substrate image.
So I'm still doing my usual 2 minutes etch, then image routine. It'll take as long as it takes.
OK fedi hivemind... I'm looking for a flat square of material about 1cm on a side and maybe 1mm thick that is going to survive being boiled in hot nitric/sulfuric acid for a couple of minutes, then rinsed in acetone and water.
I'm thinking a glass or ceramic, but don't have a source for ready made chunks of the right size (microscope coverglasses are too fragile).
You can get pre-diced silicon wafers with chunks the right size (e.g. Ted Pella 16006) but that's ann…
Second time in the past couple of days that I've joined a Teams call for work, hear the person leading the meeting go "We're still missing a few people let's give them a couple minutes", then silence.
And silence.
And 5 minutes later I get a text from someone asking where I am, and I'm like "still in the meeting waiting for people to join?"
But apparently the connection got borked after I joined and I got silently disconnected server side…
Took a few minutes over lunch to iron out the last of the bugs in the happy path of PCIe link training.
There's no timeouts or fallback if there's problems but if the other side is happy, it will train up to L0 and then sit there ignoring all incoming traffic.
After a while, the link partner gets mad that it hasn't seen a single DLLP from me and drops the link. I don't implement recovery yet so things go downhill from there.