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smallNet: Implementation of a convolutional layer in tiny FPGAs
Fernanda Zapata Bascu\~n\'an, Alan Ezequiel Fuster
https://arxiv.org/abs/2509.25391 https://

smallNet: Implementation of a convolutional layer in tiny FPGAs
Since current neural network development systems in Xilinx and VLSI require codevelopment with Python libraries, the first stage of a convolutional network has been implemented by developing a convolutional layer entirely in Verilog. This handcoded design, free of IP cores and based on a filter polynomial like structure, enables straightforward deployment not only on low cost FPGAs but also on SoMs, SoCs, and ASICs. We analyze the limitations of numerical representations and compare our impleme…