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@azonenberg@ioc.exchange
2025-11-05 07:42:14

Did I mention IC reversing is absolute crack for AuDHD brains?
I should probably put down the EEPROM, at least for a while, and move on to other stuff. But I'm having too much fun.
This is the dangerous part, and the part I have the most trouble with... the problem is so big you'll *never* be done (especially doing it manually without any automation, figuring out what each cell is by hand, etc).
There's always more to discover. Nerd sniping to the 20th power.

Schematic showing two NAND2s, an inverter, and a level shifter drawn out of individual MOSFETs with W/L of each annotated
Physical layout of the circuit described in the schematic with cells outlined and each transistor labeled
Vectorization of the entire EEPROM IP with image layers hidden showing the areas that have been traced out
Closeup vectorization of the north corner of the EEPROM bitcell array