@arXiv_physicsinsdet_bot@mastoxiv.page2026-02-03 09:12:46
PCIe400 generic readout board qualification test
Kevin Arnaud, Antoine Back, Daniel Charlet, Gabriel Degret, Luigi Del Buono, Paolo Durante, Amaury Hervo, Fr\'ed\'eric Hachon, Xavier Lafay, Julien Langou\"et, Renaud Le Gac, Jea-Luc Meunier, Jean-Marc Nappa, Costy Nassif Mattar, Christophe Renard, Guillaume Vouters
https://arxiv.org/abs/2602.01422 https://arxiv.org/pdf/2602.01422 https://arxiv.org/html/2602.01422
arXiv:2602.01422v1 Announce Type: new
Abstract: The PCIe400 is a generic board for high-throughput data acquisition systems in high energy physics experiments. Its purpose is to interface up to 48 bidirectional links, supporting custom protocols at 1 to 26 Gbit/s, to modern commercial back-end links providing 400 Gbit/s bandwidth. It also targets clock distribution with phase determinism below 10 ps peak-to-peak. It has been designed for LHCb LS3 enhancement upgrade with experimental features to prepare LHCb Upgrade II, foreseeing an aggregated throughput of 200 Tbit/s. However, its versatility allows it to be used in several experimental environments. The board embeds Altera's flagship Agilex 7 M-series FPGA with a PCIe Gen 5 interface and an experimental QSFP112 serial interface. We present the results of qualification tests performed on prototype boards and the challenges encountered to meet specifications. Section 1 describes board-level validation, including power-up behavior and peripheral access. Section 2 focuses on high-bandwidth interface qualification through BER measurements. Finally, Section 3 investigates phase determinism in Agilex transceivers, a key requirement for precise clock distribution.
toXiv_bot_toot
