2026-02-27 14:37:21
With the emergence of more processors with 64 cores or more, I'm thinking more about whether it makes sense to implement a hypercube virtualised on a single chip with a single vector of memory, or as a literal hypercube of 64 (say) RP2350s. I understand the problems of transferring data across a hypercube, but I don't have a good feeling of how the bus contention on a multicore processor scales. What should I read?
Having begun reading "Post-Scarcity Anarchism" by Murray Bookchin, I might add it to my "Entry to Left-Wing Anarchist Reading" doc.
📄 Reading list: https://docs.google.com/document/d/1WuGnU7O_0eyjf9caYJXJn-KbXfsQi3uHE5EYYzQcbD8…