Tootfinder

Enable Lightweight and Precision-Scalable Posit/IEEE-754 Arithmetic in RISC-V Cores for Transprecision Computing
Qiong Li, Chao Fang, Longwei Huang, Jun Lin, Zhongfeng Wang
https://arxiv.org/abs/2505.19096

Enable Lightweight and Precision-Scalable Posit/IEEE-754 Arithmetic in RISC-V Cores for Transprecision Computing
While posit format offers superior dynamic range and accuracy for transprecision computing, its adoption in RISC-V processors is hindered by the lack of a unified solution for lightweight, precision-scalable, and IEEE-754 arithmetic compatible hardware implementation. To address these challenges, we enhance RISC-V processors by 1) integrating dedicated posit codecs into the original FPU for lightweight implementation, 2) incorporating multi/mixed-precision support with dynamic exponent size for…

As part of the #IWP9 #hackathon, we were debugging the bringup of the RISC-V port of 9front to QEMU yesterday. It was really painful, compared to my experiences with other kernels like Linux and the ease of Rust and its built-in print format capabilities. We were finally able to use uartputs with a s…

Enabling Syscall Intercept for RISC-V
Petar Andri\'c, Aaron Call, Ramon Nou
https://arxiv.org/abs/2505.10217 https://arxiv.org/pd…

Enabling Syscall Intercept for RISC-V
The European Union technological sovereignty strategy centers around the RISC-V Instruction Set Architecture, with the European Processor Initiative leading efforts to build production-ready processors. Focusing on realizing a functional RISC-V ecosystem, the BZL initiative (www.bzl.es) is making an effort to create a software stack along with the hardware. In this work, we detail the efforts made in porting a widely used syscall interception library, mainly used on AdHocFS (i.e., DAOS, GekkoFS…